INTERVIEW QUS ON MP
INTERVIEW QUS ON MP
Our 50+ Microprocessor questions and answers focus on all areas of Microprocessor subject covering the most important topics in the Microprocessor. These topics are chosen from a collection of most authoritative and best reference books on Microprocessor.
1 | What does microprocessor speed depend on? | |
a)Clock | b)Data bus width | |
c)Address bus width | d)Control bus width | |
2 | Why 8085 Processor called an 8-bit processor? | |
a)Because the 8085 processor has 8-Bit ALU. | b)Because the 8085 processor has an 8-Bit data bus. | |
c)Both because the 8085 processor has 8-Bit ALU and because the 8085 processor has an 8-Bit data bus. | d)none of these | |
3 | Which one is not a flag bit | |
a)Parity | b)Cary | |
c)Sign | d)Operand | |
4 | What is the maximum number of memory locations supported by 8085?(Probable duplicate) | |
a)10000 | b)32768 | |
c)65536 | d)No limit | |
5 | Name of the program responsible to transfer hex input to binary is | |
a)System Program | b)Application Program | |
c)Compiler | d)Monitor Program | |
6 | HLT is a _______ instruction | |
a)1 Byte | b)2 Byte | |
c)3 Byte | d)4 Byte | |
7 | Which is not a valid register pair? | |
a)BC | b)DE | |
c)HL | d)BL | |
8 | Which flag is used for BCD Addition?(Probable duplicate) | |
a)Carry | b)Auxiliary Carry | |
c)Parity | d)Sign | |
9 | Which is a 16 bit register? | |
a)Accumulator | b)Flag | |
c)Program Counter | d)Register C | |
10 | LDA 8050H requires ____ numbers of machine cycle | |
a)3 | b)1 | |
c)4 | d)none of these | |
11 | How many T-States are there in STA 8050H instruction?(Probable duplicate) | |
a)9 | b)10 | |
c)11 | d)13 | |
12 | Which one is closely related to the Clock pulse? | |
a)Instruction Cycle | b)Machine Cycle | |
c)T-States | d)None of these | |
13 | Which combination of S1 and S0 is for Halt?(Probable duplicate) | |
a)00 | b)01 | |
c)10 | d)11 | |
14 | Which stack is used in 8085? | |
a)FIFO | b)LIFO | |
c)FILO | d)None of these | |
15 | What are the Control signals used for DMA operation?(Probable duplicate) | |
a)INT and INTA | b)IN and OUT | |
c)HOLD and HLDA | d)None of these | |
16 | What is a SIM?(Probable duplicate) | |
a)Select Interrupt Mask | b)Sorting Interrupt Mask | |
c)Set Interrupt Mask | d)None of these | |
17 | Vector Address of RST 3 is | |
a)0020H | b)0018H | |
c)0081H | d)None of these | |
18 | Address line for RST3 is? | |
a)0020H | b)0028H | |
c)0018H | d)0038H | |
19 | Addressing mode of STA 8055H instruction is | |
a)Immediate | b)Implied | |
c)Stack | d)Memory Direct | |
20 | MVI B, 60H is _____ Byte instruction | |
a)1 | b)2 | |
c)3 | d)None of these | |
21 | The interrupt line having highest priority is | |
a)RST 7.5 | b)TRAP | |
c)Both RST 7.5 and TRAP | d)None of these | |
22 | Stack Pointer is a _________ register | |
a)4 bit | b)8 bit | |
c)16 bit | d)None of these | |
23 | DAD D is a _______ instruction | |
a)1 Byte | b)2 Byte | |
c)3 Byte | d)4 Byte | |
24 | When DMA controller works as a normal peripheral device, it acts in(Probable duplicate) | |
a)Master Mode | b)Slave Mode | |
c)both Master Mode & Slave Mode | d)None of these | |
25 | In ADD C instruction, one of the operands is stored in | |
a)Stack Memory | b)Accumulator | |
c)Main Memory | d)None of these | |
26 | What is the clock frequency of an 8085 Microprocessor? | |
a)6 MHz | b)4 MHz | |
c)3 MHz | d)None of these | |
27 | RD pin of 8085 is _______ and ________ | |
a)Active low, Input | b)Active low, Output | |
c)Active High, Input | d)Active High, Output | |
28 | Which flag is associated with JNC 8050H instruction? | |
a)Zero | b)Sign | |
c)Carry | d)Auxiliary Carry | |
29 | Which flag is associated with JNZ 8050H instruction? | |
a)Zero | b)Parity | |
c)Carry | d)Sign | |
30 | HLT op-code means | |
a)Load data to accumulator | b)Store result in memory | |
c)Load accumulator with content of register | d)End of program | |
31 | Length of the instruction POP D is | |
a)1 Byte | b)2 Byte | |
c)3 Byte | d)4 Byte | |
32 | XCHG instruction exchanges the content of H-L with ______ register pair. | |
a)BC | b)DE | |
c)PSW | d)SP | |
33 | To interface a memory with 2048 locations, how many address lines will be used? | |
a)10 | b)11 | |
c)12 | d)16 | |
34 | In peripheral-mapped-I/O, every device address is of | |
a)8 bit | b)16 bit | |
c)24 bit | d)32 bit | |
35 | The advantage of memory mapped I/O over I/O mapped I/O is | |
a)Faster | b)Many instructions supporting memory mapped I/O | |
c)Require a bigger address decoder | d)All of these | |
36 | An interrupt in which the external device supplies its address as well as the interrupt requests is known as | |
a)Vectored interrupt | b)Maskable interrupt | |
c)Non maskable interrupt | d)Designated Interrupt | |
37 | Number of Hex digits needed to represent the 16-bit address of a memory location are | |
a)3 | b)4 | |
c)5 | d)6 | |
38 | Priority Encoder essentially is a | |
a)Encoder | b)Decoder | |
c)R/W memory | d)Multiplexer | |
39 | Third state of a tri-state device is | |
a)High | b)Low | |
c)High-Impedance | d)both high and low | |
40 | Address bus width of Intel 8086 is | |
a)10 bit | b)8 bit | |
c)16 bit | d)20 bit | |
41 | Total addressable memory location supported by Intel 8086 is | |
a)28 | b)210 | |
c)216 | d)220 | |
42 | Full form of OF in Intel 8086 microprocessor is | |
a)Overflow Flag | b)Overdue Flag | |
c)One Flag | d)Over Flag | |
43 | in Intel 8086 microprocessor, the work of EU is | |
a)Encoding | b)Decoding | |
c)Processing | d)Calculation | |
44 | In Intel 8086, ________ is used to write into the memory | |
a)RD | b)WR | |
c)RD/WR | d)CLK | |
45 | The RD, WR, M/IO are the heart of control for ________ mode(Probable duplicate) | |
a)Minimum | b)Maximum | |
c)Compatibility | d)Control | |
46 | The ___________ pin is used to select direct command word | |
a)A0 | b)D7 | |
c)D6 | d)A12 | |
47 | The _____ is used to connect more microprocessor(Probable duplicate) | |
a)Peripheral | b)Cascade | |
c)I/O devices | d)Control unit | |
48 | ALE stands for | |
a)Address Level Enable | b)Address Latch Enable | |
c)Address Leak Extension | d)Address Leak Enable | |
49 | The instruction, MOV AX, 0005H belongs to the address mode | |
a)Register | b)Direct | |
c)Immediate | d)Register Relative | |
50 | NOP instruction introduces | |
a)Address | b)Delay | |
c)Memory Location | d)None of these |
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